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INTEGRATED CIRCUITS
DATA SHEET
TDA3504 Video control combination circuit
Product specification Supersedes data of April 1995 File under Integrated Circuits, IC02 1996 Jan 09
Philips Semiconductors
Product specification
Video control combination circuit
FEATURES * Capacitive coupling of the colour difference and luminance input signals with black level clamping in the input stages * Linear saturation control acting on the colour difference signals * (G-Y) and RGB matrix * Linear transmission of inserted signals * Equal black levels for inserted and matrixed signals * 3 identical channels for the RGB signals * Linear contrast and brightness controls, operating on both the inserted and matrixed RGB signals * Clamping, horizontal and vertical blanking of the three input signals controlled by a 3-level sandcastle pulse * Emitter-follower outputs for driving the RGB output stages. GENERAL DESCRIPTION
TDA3504
The TDA3504 is an integrated circuit which performs video control functions in a PAL/SECAM decoder for negative colour difference signals -(R-Y) and -(B-Y). The required input signals are luminance and colour difference and a 3-level sandcastle pulse for control purposes. Linear RGB signals can be inserted from an external source. RGB output signals are available for driving the video output stages.
QUICK REFERENCE DATA All voltages referenced to pin 18 (ground). SYMBOL VP IP V11(p-p) V15(p-p) V14(p-p) V10, 9, 8(b-w) V6 PARAMETER supply voltage (pin 2) supply current (pin 2) video blanking sync (VBS) input signal (peak-to-peak value) -(B-Y) colour difference input signal (peak-to-peak value) -(R-Y) colour difference input signal (peak-to-peak value) inserted RGB signals (black-to-white value) 3-level sandcastle pulse level 1 level 2 level 3 V17 V16 V12 Tamb control voltage brightness control voltage contrast control voltage saturation operating ambient temperature - - - 1.0 2.0 2.0 0 2.5 4.5 8.0 - - - - - - - 3.0 4.2 4.2 +70 V V V V V V C - - - - - - MIN. 95 0.45 1.33 1.05 1.0 TYP. 12.0 - - - - - - MAX. V mA V V V V UNIT
ORDERING INFORMATION TYPE NUMBER TDA3504 1996 Jan 09 PACKAGE NAME DIP20 DESCRIPTION plastic dual in-line package; 20 leads (300 mil) 2 VERSION SOT146-1
1996 Jan 09
signal insertion (1 V) R G B 3 x SIGNAL SWITCH (R Y) (1.05 V p-p) 14 CLAMPING SATURATION CONTROL (R Y) R MATRIX 10 9 8 CONTRAST CONTROL BRIGHTNESS CONTROL 5 4 3 OUTPUT STAGE red BLANKING 19 red 5 V B/W Y CONTRAST CONTROL R MATRIX BRIGHTNESS CONTROL OUTPUT STAGE green BLANKING 20 green 5 V B/W 4.4 V G-Y MATRIX (G Y)
BLOCK DIAGRAM
Philips Semiconductors
Video control combination circuit
3
SATURATION CONTROL (B Y) (1.33 V p-p) 15 CLAMPING clamping pulse Y VBS signal (0.45 V p p) 11 CLAMPING Y AMPLIFIER (B Y) 2.9 V 12 saturation control voltage (2 to 4.2 V) 2 VP (+12 V)
Y CONTRAST CONTROL R MATRIX BRIGHTNESS CONTROL OUTPUT STAGE blue BLANKING 1 blue 5 V B/W
Y 4.5 V DRIVER FOR SIGNAL SWITCHES PEAK DRIVE LIMITING
clamping pulse H+V SANDCASTLE DETECTOR 3 18 7 input for signal switching voltage 16 contrast control voltage (2 to 4.2 V) 17 brightness control voltage (1 to 3 V) sandcastle pulse 6 13
MSA516 - 1
TDA3504
n.c.
8V 4.5 V 2.5 V 0V
Product specification
TDA3504
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Video control combination circuit
PINNING SYMBOL BO VP CB CG CR SAND FSW BI GI RI Y SAT n.c. -(R-Y) -(B-Y) CON BRI GND RO GO PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 blue output supply voltage (+12 V) blue storage capacitor for brightness green storage capacitor for brightness red storage capacitor for brightness sandcastle pulse input fast switch for RGB input blue input (external signal) green input (external signal) red input (external signal) luminance input saturation control input not connected colour difference input colour difference input contrast control input brightness control input ground (0 V) red output green output
GI 9 BO VP CB CG CR SAND FSW BI 1 2 3 4 5
TDA3504
DESCRIPTION
20 GO 19 RO 18 GND 17 BRI 16 CON TDA3504 15 14 (B Y) (R Y)
6 7 8
13 n.c. 12 SAT 11 Y
MSA513
RI 10
Fig.2 Pin configuration.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VP V6 V7 V12, 16, 17 Vn I1, 19, 20 (av) I1, 19, 20(max) I16 (av) I17 Ptot Tamb Tstg PARAMETER supply voltage (pin 2) sandcastle voltage (pin 6) fast switch voltage (pin 7) control input voltage (pins 12, 16 and 17) voltage on pins 1, 3, 4, 5, 8 to 11, 14, 15, 19 and 20 average output current (pins 1, 19 and 20) maximum output current (pins 1, 19 and 20) average output current (pin 16) input current (pin 17) total power dissipation operating ambient temperature storage temperature - - - - - 0 -25 0 0 -0.5 0 MIN. 13.2 VP +3.0 0.5VP no external DC voltage -3 -10 10 5 1.7 +70 +150 mA mA mA mA W C C MAX. V V V V UNIT
1996 Jan 09
4
Philips Semiconductors
Product specification
Video control combination circuit
TDA3504
CHARACTERISTICS VP = 12 V; V8, 9, 10(p-p) = 1 V; V11(p-p) = 0.45 V; V14(p-p) = 1.05 V; V15(p-p) = 1.33 V; Tamb = 25 C; measured in Figs 3 and 4; nominal settings of brightness (V17 = 2 V), contrast (V16 = 3.6 V) and saturation (V12 = 3.1 V); all voltages referenced to ground (pin 18); unless otherwise specified. SYMBOL Supply VP IP V14(p-p) V15(p-p) I14, 15 R14, 15 V14, 15 V12 supply voltage (pin 2) supply current (pin 2) -(R-Y) input signal (pin 14) (peak-to-peak value) -(B-Y) input signal (pin 15) (peak-to-peak value) input current between clamping pulses input resistance internal DC voltage due to clamping note 2 control voltages(2) note 1 10.8 65 - - - 1.0 3.8 12.0 95 13.2 125 V mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Colour difference inputs (pins 14 and 15) for saturated colour bar with 75% of maximum amplitude for saturated colour bar with 75% of maximum amplitude 1.05 1.33 - - 4.2 1.48 1.88 0.2 - 4.8 V V A M V
Saturation control (pin 12) maximum saturation nominal saturation 6 dB below maximum 4.0 2.9 4.2 3.1 2.1 50 - 4.4 3.3 2.3 - 20 V V V dB A
-26 dB saturation referenced 1.9 to maximum SAT II minimum saturation input current V12 = 1.8 V 46 -
(G-Y) matrix (see note 3) Luminance input (pin 11) V11(p-p) I11 R11 V11 m VBS input signal (peak-to-peak value) input current between clamping pulses input resistance input DC voltage due to clamping linearity note 2 nominal settings note 4 - - 1.0 2.5 0.85 450 - - 2.9 - 630 0.4 - 3.3 - mV A M V
RGB channels SIGNAL SWITCHING INPUT (PIN 7) V7 V7 Ci II normal state voltage; no insertion voltage level for insertion on input capacitance input current V7 = 0 to 3 V 0 0.9 - - - - 0.4 3.0 10 +430 V V pF A
-100 -
1996 Jan 09
5
Philips Semiconductors
Product specification
Video control combination circuit
TDA3504
SYMBOL
PARAMETER
CONDITIONS
MIN. - - 4.0
TYP.
MAX.
UNIT
SIGNAL INSERTION: RI (PIN 10); GI (PIN 9); BI (PIN 8) V8, 9, 10(b-w) I8, 9, 10 V8, 9, 10 V16 external RGB input signals (black-to-white value) input current between clamping pulses internal DC voltage due to clamping notes 2 and 5 control voltages(2) 1.0 - 4.5 1.4 0.5 5.0 V A V
Contrast control (pin 16) maximum contrast nominal contrast 3 dB below maximum -10 dB below maximum CON RGBdiff minimum contrast difference between RGB channels referenced to maximum; V16 = 2 V contrast -10 dB below maximum 4.0 3.4 2.6 17 - 4.2 3.6 2.8 21 - 4.4 3.8 3.0 29 0.6 V V V dB dB
Peak drive limiting Vth I16 threshold voltage input current at contrast control input internal signal limiting Brightness control (pin 17) V17 II Vblk(b-w) control voltages(2) input current shift of black level in the control range referenced to the luminance signal (black-to-white value) tracking RGB outputs (emitter follower; pins 19, 20 and 1) V19, 20, 1 V19, 20, 1 output voltage difference in black level between RGB channels due to variation of contrast control internal current source black-to-white positive 4.0 - 5.0 - 6.5 10 V mV brightness control range nominal brightness no beam current limiting; V17 = 1 to 3 V V17 = 1 V 1.0 - - - - 2.0 - 40 3.0 - -10 - V V A % note 2 V1, 19, 20 Vth referenced to nominal output amplitude; note 6 8.5 10 110 8.8 20 - 9.1 30 - V mA %
95
-
-
%
I19, 20, 1 Gv19, 20, 1-11 19, 20, 1-11
2.0
3.0
4.0
mA
Gain data (at nominal brightness, contrast, saturation and white point settings) voltage gain with respect to luminance input (pin 11) frequency response of luminance path f = 0 to 5 MHz 22 - 24 - 26 3 dB dB
1996 Jan 09
6
Philips Semiconductors
Product specification
Video control combination circuit
TDA3504
SYMBOL Gv1-15; Gv19-14 1-15; 19-14 Gv19-10; Gv20-9; Gv1-8 19-10; 20-9; 1-8 t19, 20, 1 td G19, 20, 1
PARAMETER voltage gain with respect to colour difference inputs (pins 14 and 15) frequency response of colour difference paths voltage gain with respect to inserted signals frequency response of inserted signal paths difference in transition times between R, G and B channels delay time between signal switching and signal insertion difference in gain between normal and signal insertion mode
CONDITIONS
MIN. 11
TYP. 14 - 14 - 0 - -
MAX. 17 3 16 3 15 +25 10
UNIT dB dB dB dB ns ns %
f = 0 to 2 MHz
- 12
f = 0 to 10 MHz
- - -25 -
Sandcastle pulse detector (pin 6) V6 the following amplitudes are required for separating the various pulses horizontal and vertical blanking; notes 7 and 8 horizontal; note 7 clamping; notes 7 and 9 no keying; note 7 II td Notes 1. Maximum value 110 mA after warm-up. 2. Values are proportional to the supply voltage. 3. Matrixed according to equation V(G-Y) = -0.51V-(R-Y) - 0.19V-(B-Y). 4. Clipping due to internal signal limitation may occur when the Y input is greater than nominal and maximum contrast and minimum brightness. 5. When V7-18 < 0.4 V during clamping time, the black levels of the inserted RGB signals are clamped on the black levels of the internal RGB signals. When V7-18 > 0.9 V during clamping time, the black levels of the inserted RGB signals are clamped on an internal DC voltage (correct clamping of the external RGB signals is possible only when they are synchronous with the sandcastle pulse). 6. Internal signal limitation is allowed to start at 5.5 V after warm-up time. 7. The sandcastle pulse is compared with three internal thresholds (proportional to VP) and the given levels separate the various pulses. 8. Blanked to ultra-black (-25%). 9. Pulse duration 3.5 s. input current delay of leading edge of clamping pulse LOW 2.1 4.1 7.6 - - - 2.5 4.5 8.0 - - 0.5 2.9 5.0 12.0 1.0 -110 - V V V V A s
1996 Jan 09
7
Philips Semiconductors
Product specification
Video control combination circuit
APPLICATION INFORMATION
TDA3504
B 1 +12 V (VP) 22 nF 3 22 nF 4 22 nF 5 16 17 18 20
G
R
2
19
GND
1N4148
beam current (actual value) brightness 1 to 3 V
150 k
TDA3504
sandcastle pulse signal switch 1V pulse 75 (1) B 1 V (B/W) 75 (1) G 1 V (B/W) 75 (1) R 1 V (B/W) 75 (1) 10 nF 10 11 10 nF 9 12 10 nF 8 13 n.c. 6 15
4.7 F
contrast 2 to 4 V (B Y) 1.33 V (p-p) (R Y) 1.05 V (p-p)
10 nF
10 nF 7 14
signal insertion
saturation 2 to 4 V 47 nF Y (0.45 V VBS signal)
MSA515
(1) When supplied via a 75 line.
Fig.3 Basic application circuit diagram.
1996 Jan 09
8
Philips Semiconductors
Product specification
Video control combination circuit
TDA3504
B 1 20
G
R
+12 V
+12 V (VP)
22 H 22 F
+12 V (to other circuits)
2 22 nF 3 22 nF 4 22 nF 5
19 180 k 18 56 k 17 22 nF 15 k 910 k contrast 0 to 12 V (B Y) 1.33 V (p-p) (R Y) 1.05 V (p-p) brightness 0 to 12 V
16
TDA3504
sandcastle pulse signal switch 1V pulse 75 (1) B 1 V (B/W) 75 (1) G 1 V (B/W) 75 (1) R 1 V (B/W) 75 (1) +12 V 8.2 k 3.9 k 10 nF 10 11 10 nF 9 12 10 nF 8 13 6 15
4.7 F
680 k 240 k 10 nF
10 nF 7 14
n.c.
22 nF
100 k 56 k saturation 0 to 12 V Y (1 V VBS signal)
signal insertion
47 nF
22 k
1 k Y-delay line 10 k
1N4148
1 k
beam current (actual value)
1N4148
22 F
MSA514
(1) When supplied via a 75 line.
Fig.4 Typical application circuit diagram.
1996 Jan 09
9
Philips Semiconductors
Product specification
Video control combination circuit
PACKAGE OUTLINE DIP20: plastic dual in-line package; 20 leads (300 mil)
TDA3504
SOT146-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 20 11 MH wM (e 1)
pin 1 index E
1
10
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D
(1)
E
(1)
e 2.54 0.10
e1 7.62 0.30
L 3.60 3.05 0.14 0.12
ME 8.25 7.80 0.32 0.31
MH 10.0 8.3 0.39 0.33
w 0.254 0.01
Z (1) max. 2.0 0.078
26.92 26.54 1.060 1.045
6.40 6.22 0.25 0.24
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT146-1 REFERENCES IEC JEDEC EIAJ SC603 EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-05-24
1996 Jan 09
10
Philips Semiconductors
Product specification
Video control combination circuit
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA3504
with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1996 Jan 09
11
Philips Semiconductors - a worldwide company
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Internet: http://www.semiconductors.philips.com/ps/ For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-2724825 SCDS47 (c) Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
533061/1100/02/pp12 Document order number: Date of release: 1996 Jan 09 9397 750 00556

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